The present invention relates to a method of forming a contact plug of a semiconductor device and, more particularly, to a method of forming a contact plug of a semiconductor device, which forms source/drain contact plugs of a NAND flash memory.
Generally, semiconductor memory devices can be classified into volatile memory devices and non-volatile memory devices. Volatile memory devices, such as Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM), exhibit high speed data input/output characteristics, but stored data is lost when power is turned off. Non-volatile memory devices retain their data even when power is turned off.
A flash memory device is a high-integrated non-volatile memory device. The flash memory device was developed by taking advantage of Erasable Programmable Read Only Memory (EPROM) that can be programmed and erased and Electrically Erasable Programmable Read Only Memory (EEPROM) that can be electrically programmed and erased. Here, the term ‘program’ refers to an operation of writing data into a memory cell, and the term ‘erase’ refers to an operation of deleting data written into a memory cell.
The flash memory device may be categorized as NOR type or NAND type flash memory devices according to the structure and operating condition of a cell. In the NOR type flash memory device, the drain of each memory cell transistor is coupled to a bit line, enabling program and erase with respect to a specific address and, therefore, increasing operating speed. The NOR type flash memory device is generally used in applications requiring a high-speed operation. In contrast, in the NAND type flash memory device, a plurality of memory cell transistors is connected in series, constituting one string, and one string is coupled between bit lines and a common source line. Thus, the NAND type flash memory device has a relatively small number of drain contact plugs, facilitating high integration. Accordingly, the NAND type flash memory device is generally used in applications requiring high-capacity data retention.
The NAND type flash memory device includes a plurality of word lines formed between a source select line and a drain select line. A select line, for example, the source select line or the drain select line, is formed by connecting gates of select transistors, each included in a plurality of strings. The word lines are formed by connecting gates of memory cell transistors. The select line and the word line include a tunnel oxide layer, a floating gate, a dielectric layer and a control gate. In the select line, the floating gate and the control gate are electrically connected. A junction is formed between each select line and each word line. The junction between the source select lines is a source area, and the junction between the drain select lines is a drain area.
A spacer and a nitride layer are formed on the sides of the select lines and the word lines. An insulating layer is formed on the entire surface of the select lines and the word lines. A contact hole, through which the junction between the select lines is exposed, is formed in the insulating layer. The contact hole is gap-filled with conductive material, thereby forming a contact plug electrically connected to the junction.
FIG. 2 is a photograph showing defects on the sidewalls of a select line in a conventional process of forming contact holes.
The nitride layer can protect the sides of the select lines to some extent when the contact holes are misaligned. However, when the contact holes are greatly misaligned, much of the nitride layer is lost, which may cause the nitride layer to break. Accordingly, the sidewalls of the spacer and the select lines formed under the nitride layer may be lost and broken (refer to ‘C’). Consequently, the select lines and the contact plug are directly interconnected, resulting in failure of the memory device.